1. Field of the Invention
The invention relates to the fabrication of integrated circuits and to the deposition of an amorphous silicon film by a chemical vapor deposition technique.
2. Background Of the Related Art
Semiconductor device geometries have dramatically decreased in size since such devices were first introduced several decades ago. Since then, integrated circuits have generally followed the two year/half-size rule (often called Moore""s Law), that means that the number of devices on a chip doubles every two years. Today""s fabrication plants are routinely producing devices having 0.35xcexcm and even 0.18 xcexcm feature sizes, and tomorrow""s plants soon will be producing devices having even smaller geometries. As the feature size decreases, the thickness of deposited materials, such as dielectrics, remain substantially constant, with the result that the aspect ratios for the features, i.e., their height divided by width, increases. Many traditional deposition processes have difficulty filling sub-micron structures where the aspect ratio exceeds 4:1, and particularly where the aspect ratio exceeds 10:1.
Chemical vapor deposition (CVD) appears to be the most promising approach to deposit materials conformally within high aspect features. Integration of CVD films in semiconductor manufacturing is well-characterized and fairly simple to implement as compared to wet processes such as spin-on methods. The potential of using commercially available CVD equipment and simple manufacturing methodology makes CVD materials attractive from both an integration and an economic standpoint.
One material that can be deposited by CVD techniques is amorphous silicon. Amorphous silicon layers are used in the formation of gate electrodes in transistors, metal-silicon Schottky diodes, and as electrodes for capacitors in dynamic random-access memory (DRAM) integrated circuits. Amorphous silicon layers have conventionally been deposited with limited success by conventional chemical vapor deposition techniques.
For example, in one conventional method, atmospheric pressure chemical vapor deposition (APCVD), the deposition process is often carried out at temperatures greater than 650xc2x0 C., and often more than 1000xc2x0 C. These high processing temperatures can exceed the thermal budgets of the materials used in manufacturing processes and result in inter-layer diffusion and material decomposition. As such, high processing temperatures can limit the incorporation of the APCVD deposition process in the manufacturing of some semi-conductor devices. A further problem with the high deposition temperatures of APCVD processes is that materials deposited on the substrate surface, such as amorphous silicon, may form grains or crystals of variable sizes and orientations that result in films having variable uniformity and less than desirable film properties. Post deposition annealing processes of films with the variable sized and orientated grains and crystals typically do not improve crystal uniformity or improve film properties.
Other techniques, such as low pressure chemical vapor deposition (LPCVD) can be used to deposit amorphous silicon films at lower processing temperatures than APCVD, i.e., a deposition temperature lower than about 650xc2x0 C. However, LPCVD methods often produce non-uniform amorphous silicon films having undesirable film characteristics such as high film resistivity and non-uniformity, which limit the use of the film in some semi-conductor manufacturing applications, such as in the formation of sub-micron semi-conductor diodes. Additionally, annealing processes for the LPCVD deposited films typically have not been successful in improving film characteristics for these films. Further, the deposition temperatures of such processes can still exceed the thermal budgets of the materials used for manufacturing semi-conductor devices and limit the use of LPCVD methods from use in some manufacturing processes.
Other LPCVD processes which may be used to deposit amorphous silicon films, such as disclosed in U.S. Pat. No. 5,604,152, require the precursor gas to be partially dissociated in an attached autoclave prior to entering the deposition chamber. This pre-deposition disassociation adds undesirable mechanical and procedural complexity to the deposition process and still requires the films to be deposited at high temperatures (i.e., greater than 500xc2x0 C.). Furthermore, LPCVD processes are typically performed by a thermal decomposition mechanism of silicon precursors at relatively low deposition rates compared to other amorphous silicon deposition processes. The low deposition rates result in increased processing times, increased processing costs, and reduced substrate throughput.
Therefore, there exists a need for a process which deposits high quality amorphous silicon layers at reduced processing temperatures.
Aspects of the invention provide for depositing an amorphous silicon film on a substrate using a high density plasma chemical vapor deposition (HDP-CVD) technique. In one aspect, a method is provided for forming an amorphous silicon film on a substrate including positioning the substrate on a support member into a processing chamber connected to a bias power source, introducing an inert gas into the processing chamber, introducing a silicon source gas into the processing chamber, and delivering a source power to the processing chamber sufficient to generate a high density plasma. The deposited amorphous silicon film may then be annealed to enhance film properties.
In another aspect, a method is provided for forming an amorphous silicon film on a substrate including positioning the substrate in a high density plasma chemical vapor deposition chamber, introducing an inert gas into the high density plasma chemical vapor deposition chamber, introducing a silicon source gas into the high density plasma chemical vapor deposition chamber, generating a high density plasma of the processing gas by applying an RF power between about 500 Watts and about 5000 Watts to each of first and second coils disposed adjacent the processing chamber, applying a bias power to the support member, and depositing the amorphous silicon film while maintaining the substrate at a temperature of about 500xc2x0 C. or less.